Principal Engineer, Virtual Prototype Modelling

Key Responsibilities

• Develop high-fidelity SystemC / TLM 2.0 models of:
• Processors, Cache Controllers, Interconnects, Peripherals, NPUs, ISPs
• Build and integrate full SoC/system virtual prototypes for early firmware/software development.
• Port RTOS/Linux onto the virtual platform and develop associated device drivers.
• Create regressable self-checking test suites using C / ARM Assembly.
• Verify models at IP and SoC levels using simulation and coverage metrics.
• Define and deploy system-level simulation flows and methodologies using VP.
• Collaborate with firmware/software teams to support virtual platform usage and debug.