Hardware Design Engineer

We’re seeking an IP Packaging Engineer with 1–2 years of experience in semiconductor design, verification, IP packaging, or closely related fields. In this role, you will package, validate, and release IP blocks that support chip design programs. You will also debug intricate design, verification, and build flows while partnering with cross-functional teams and collaborating with US-based stakeholders.

Key Responsibilities

• Package, validate, and release IP blocks for semiconductor and chip design projects.
• Collaborate with design, design verification (DV), and build/tooling teams.
• Debug complex, multi-component workflows, including IP packaging pipelines, build flows, and DV environments.
• Analyze and troubleshoot technical failures across tools, scripts, and design/verification flows to determine root causes.
• Apply Python and Shell scripting to support debugging, automation, and troubleshooting.
• Maintain clear documentation of technical findings, issues, and resolutions.
• Provide updates on progress, technical changes, and blockers to US-based teams across time zones.
• Contribute to build process improvements and support efficient IP release activities.

Mandatory Skills

• 1–2 years of experience in Semiconductor Design, VLSI, Design Verification, IP Packaging, RTL Design or related domains
• Knowledge of Chip Design Fundamentals, RTL Concepts, Design Verification Basics, Testbenches, Simulation Flows
• Practical experience in Debugging and Root Cause Analysis, Complex System Troubleshooting, Tool and Script Debugging
• Python Scripting, Shell Scripting, Automation and Troubleshooting
• Understanding of Design Flows, Verification Flows, IP Packaging Workflows
• Strong analytical and problem-solving skills
• Excellent written and verbal communication skills
• Cross-functional team collaboration and global stakeholder communication
• Willingness to work Full-time Onsite at AMD Hyderabad

Good-to-Have Skills

• Hardware Build Systems, Software Build Systems, Build Orchestration, Dependency Management
• CI/CD Pipelines, Build Automation
• Hands-on experience with AI/LLM tools, Prompt Engineering, AI Coding Assistants
• LLM-based Tool Development, AI-enabled Engineering Workflows