Senior Logic Design Engineer

Introduction

At IBM Infrastructure & Technology, we engineer and run the systems that keep the world moving. Our scope spans high-resiliency mainframes and hybrid cloud environments, along with networking, automation, and site reliability. We deliver the performance, security, and scalability that clients and industries rely on daily. In Infrastructure & Technology, you’ll address intricate challenges through curiosity and collaboration. You’ll collaborate with a global network of colleagues and work with a wide range of technologies to build resilient, future-ready solutions that support innovation. With ongoing learning, career advancement, and a strong, inclusive culture, IBM enables you to develop expertise and help shape the infrastructure powering progress.

Your Role And Responsibilities

• Own the micro-architecture, design, and development of the Instruction Sequencing Unit for high-performance Processor CPUs across IBM Systems.
• Perform micro-architecting and design of Instruction Dispatch to Issue Queues, Register Renaming for Out-of-Order Execution, Issue instructions to Execution Pipelines, and Reordering Buffers to enable high-performance processor CPU completion.
• Build feature sets and present the proposed architecture during High-Level Design discussions.
• Provide estimates for the overall effort required to develop the feature.
• Estimate silicon area and wire usage for the feature.
• Develop micro-architecture and Design RTL; collaborate with other Core units and partner teams including Verification, DFT, Physical design, Timing, FW, and SW to deliver the feature.
• Complete signoff for pre-silicon design that satisfies all functional, area, and timing objectives.
• Participate in post-silicon lab bring-up and validation of the hardware.
• Lead a team of engineers; guide and mentor team members; represent as Logic Design Lead in global forums.
  
  

Preferred Education

Master's Degree

Required Technical And Professional Expertise

• 8-15 or more years of demonstrated experience in micro-architecting and designing Instruction Dispatch unit of CPU
• Hands-on experience implementing Issue Queues, Register renaming and forwarding, Reordering Buffer and Pipeline flush/exception handling
• Deep expertise in Out of Order, Super Scalar, Multi-Threaded Core Architecture and ISA
• Experience with high frequency, instruction pipeline designs
• At least 1 generation of Processor Core silicon bring up experience
• In-depth understanding of industry microprocessor designs (e.g., x86, ARM, or RISC-V processor designs)
• Proficiency in RTL design with Verilog or VHDL
  
  

Preferred Technical And Professional Experience

• Knowledge of Instruction Decode, Memory and Execution units
• Knowledge of verification principles and coverage
• High-level knowledge of Linux operating system
• Knowledge of one object oriented language and scripting language
• Understanding of Agile development processes
• Experience with DevOps design methodologies and tools
• Advanced Static Timing: Deep understanding of static timing and its application in chip logic development can be advantageous in driving business results.
• Front-end Processing Expertise: Familiarity with front-end processing and its role in chip logic development can be valuable in shaping the future of cognitive systems logic design.
• Post-Si debug: Familiarity with Post-Si debugs is preferable.
• Performance & Power Analysis: Familiarity with analysing Performance & Power Tools data and coming up with features solving PPA issues.