QUQualcomm
Synthesis Engineer
Hyderabad ₹1-4 LPA Posted 26 May 2025
FULL TIME
Debugging
Scripting
Synthesis
Rtl Design
formal verification
+1 more
Job Description
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.Job requirements:
- Experience with Synthesis, constraints, Formal Verification and STA.
- Good Domain Knowledge on RTL Design, implementation, and Timing analysis.
- Exposure in scripting (Pearl/Python/TCL).
- IO timing sta reporting and signoff.
- Peripheral protocols like spi,i3c,i2c,sdcc/emmc etc
- Strong debugging capabilities at Synthesis, timing analysis & implementation.
- Collaborate closely with cross-function team to research, design and implement performance, constraints and power management strategy for product roadmap.
- Good team player. Need to interact with the other teams/verification engineers proactively.
- Ability to debug and solve issues independently.
- STA setup, convergence, reviews and signoff for multi-mode, multi-voltage domain designs.
- Timing analysis, validation and debug across multiple PVT conditions using PT/Tempus.
- Run Primetime and/or Tempus for STA flow optimization and Spice to STA correlation.