SY

Sr. Staff ASIC Verification Engineer

Synopsys
Pune4-8 LPA Posted 30 May 2025
FULL TIME
Tcl
Verilog
Uvm
Python
Perl Scripting
+1 more

Job Description

Key Qualifications

  • Proven desire to learn and explore new state of the art technologies
  • Demonstrate good written and spoken English communication skills
  • Demonstrate good review and problem-solving skills
  • Knowledgeable with Verilog, VHDL and/or SystemVerilog
  • Knowledgeable with scripting languages (BASH/TCSH/PERL/PYTHON/TCL) is a plus
  • Understanding of verification methodology such as UVM .
  • Good organization and communication skills
  • Be a solution provider.
  • 8+ years of relevant experience
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