SY

Sr Staff, ASIC Digital Design Engineer

Synopsys
Bangalore3-7 LPA Posted 30 May 2025
FULL TIME
Tcl
Usb
Ethernet
System Verilog
AMBA
+3 more

Job Description

What You ll Need:

  • Hands-on/lead experience with subsystems/SoC design, architecture, and implementation
  • Proficiency in Verilog/System Verilog coding and simulation tools
  • Experience with implementation flows such as synthesis flow, lint, CDC, and low power
  • Strong understanding of one or more protocols: AMBA, DDR, PCIe, Ethernet, USB, UFS
  • Programming skills in System Verilog, TCL, Perl, or Python

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