CACadence
Sr Principal Verification Engineer
Noida ₹5-10 LPA Posted 4 Jun 2026
FULL TIME
Ovm
Verilog
Uvm
Asic verification
formal verification
+3 more
Job Description
Key Responsibilities
- Apply machine learning techniques to improve and automate traditional pre-silicon verification methodologies such as Formal Verification and UVM-based verification
- Develop agentic AI solutions using Large Language Models (LLMs) and advanced ML frameworks to accelerate design verification workflows
- Integrate AI-enhanced Electronic Design Automation (EDA) tools to improve efficiency across verification and design cycles
- Design, implement, and validate next-generation verification strategies leveraging AI-driven approaches
- Perform advanced debugging of pre-silicon verification failures using waveform viewers and simulation analysis tools
- Collaborate with ML engineers and software teams to ensure correctness, efficiency, and quality of AI-driven verification outputs
- Engage with customers to understand requirements and deliver practical, scalable verification solutions
- Continuously evaluate and adopt advancements in AI, ML, and semiconductor verification technologies
- Contribute to internal knowledge sharing and innovation in AI-powered verification methodologies
- Mentor teams and provide technical leadership in functional verification and AI integration
