CA

Sr Principal Design Engineer

Cadence
Bangalore5-9 LPA Posted 5 Jun 2026
FULL TIME
Debugging
Logic Design
Verilog
Verification
Digital Design
+6 more

Job Description

Key Responsibilities

  • Work on advanced digital/analog/mixed-signal design tasks depending on project requirements
  • Develop, analyze, and optimize RTL/design implementations for semiconductor products
  • Perform design reviews and ensure compliance with architecture specifications
  • Collaborate with verification, physical design, and system engineering teams
  • Identify and resolve design issues related to performance, timing, and functionality
  • Support RTL synthesis, timing closure, and design validation activities
  • Contribute to architecture discussions and technical decision-making
  • Ensure adherence to best practices in design methodologies and coding standards

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