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Silicon Senior Physical Design Engineer, TPU, Google Cloud

Google Inc
Bangalore5-11 LPA Posted 25 Apr 2025
FULL TIME
System Verilog
low power design
SOC design

Job Description

Role Responsibilities:

  1. Define and drive the implementation of physical design methodologies for advanced SoCs.
  2. Take ownership of one or more physical design partitions or top-level designs.
  3. Manage the timing and power consumption of designs, ensuring optimal performance and efficiency.
  4. Contribute to the development and refinement of design methodologies, libraries, and code review processes.
  5. Define physical design-related rule sets for functional design engineers to follow.

Job Requirements:

  1. Bachelor's degree in Electrical Engineering or equivalent practical experience.
  2. 7 years of experience with advanced design techniques, including clock/voltage domain crossing, Design for Testing (DFT), and low-power designs.
  3. Experience with System on a Chip (SoC) design cycles.
  4. Experience in high-performance, high-frequency, and low-power designs.

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