GOGoogle Inc
Silicon Senior Physical Design Engineer, TPU, Google Cloud
Bangalore ₹5-11 LPA Posted 25 Apr 2025
FULL TIME
System Verilog
low power design
SOC design
Job Description
Role Responsibilities:
- Define and drive the implementation of physical design methodologies for advanced SoCs.
- Take ownership of one or more physical design partitions or top-level designs.
- Manage the timing and power consumption of designs, ensuring optimal performance and efficiency.
- Contribute to the development and refinement of design methodologies, libraries, and code review processes.
- Define physical design-related rule sets for functional design engineers to follow.
Job Requirements:
- Bachelor's degree in Electrical Engineering or equivalent practical experience.
- 7 years of experience with advanced design techniques, including clock/voltage domain crossing, Design for Testing (DFT), and low-power designs.
- Experience with System on a Chip (SoC) design cycles.
- Experience in high-performance, high-frequency, and low-power designs.
