Silicon Design Verification Engineer, Google Cloud

Minimum Qualifications

• Bachelor's degree in Electrical Engineering or equivalent practical experience.
• Experience in verification of IP designs (e.g., CPU, Peripherals, PMU, etc.).
• Experience with SystemVerilog, SVA and functional coverage.
• Experience with verification methodology (e.g., UVM, OVM, VMM).

Preferred Qualifications

• Master's degree in Electrical Engineering, or a related field.
• Experience creating and using verification components and environments in standard verification methodology.
• Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
• Experience with verification of AI/ML accelerators.
• Experience with ASIC standard interfaces and memory system architecture.

About the Job

• Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products.
• You'll contribute to the innovation behind products loved by millions worldwide.
• Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
• In this role, you will collaborate with design and verification engineers in active projects and perform verification.
• You will also build efficient constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs.
• You will be responsible for the life-cycle of verification, from verification planning to test execution, to collecting coverage.
• The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud.
• Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.
• We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing.
• Our global impact spans software and hardware, including Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities

• Plan the verification of digital design blocks and interact with design engineers to identify important verification scenarios.
• Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
• Identify and write all types of coverage measures for stimulus and corner-cases.
• Debug tests with design engineers to deliver functionally correct design blocks.
• Manage coverage measures to identify verification holes and show progress towards tape-out.