Silicon Architecture/Design Engineer, PhD, Early Career

Role Responsibilities:

• Drive the design and optimization of next-generation TPUs for AI/ML workloads, focusing on performance, power, and cost.
• Develop and evaluate architectural and microarchitectural models, including power/performance trade-offs for TPUs.
• Collaborate with hardware and software teams to create high-performance hardware/software interfaces for AI/ML applications.
• Implement advanced AI/ML techniques to optimize physical design convergence, timing, and floor planning for TPUs.

Job Requirements:

• PhD degree in Electronics and Communication Engineering, Electrical Engineering, Computer Engineering, or related technical field.
• Experience with accelerator architectures, data center workloads, and programming languages (C++, Python, Verilog).
• Post-PhD experience (2 years preferred) with performance modeling tools and memory hierarchy design.
• Strong knowledge in high-performance and low-power design techniques for hardware accelerators.