Senior ASIC CAD Engineer

KEY RESPONSIBILITIES:

• Work closely with CAD implementation members to deliver high quality tools and flows that meet all the key metrics of QoR: Manufacturability, Reliability, Timing, Area, and Performance.
• Regress methodology and develop capabilities to improve quality.
• Develop the strategy and key initiatives to ensure the CAD flows meet the future design needs and the most advances technologies.

PREFERRED EXPERIENCE:

• 3-5 years experience in Silicon design or CAD/EDA development
• Understanding of EDA tools from Synopsys and Cadence
• Synopsys 3DIC Compiler experience is a plus
• Proficient in programming with Python and Linux
• Familiar in automating workflows in a distributed compute environment.
• Excellent communication skills (both written and oral).

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Computer Engineering/Electrical Engineering