R&D Engineering, Staff Engineer - IP Verification

Bangalore ₹3-7 LPA Posted 30 May 2025

FULL TIME

Usb

Uvm

systemverilog

Expertise in UVM and System Verilog
Experience in verification IP modelling with knowledge of test case coding, scoreboard design, assertions, checkers & functional coverage.
Involved & played a driving role in the development of reusable Verification environments for at least 2 verification projects using VMM/OVM/UVM methodologies.
Protocol experience: Should have experience on UCIe / PCIe / CXL / Unipro / USB / MIPI / HDMI / Ethernet / DDR / LPDDR / HBM memory protocol