CA

Principal Software Engineer

Cadence
Noida5-9 LPA Posted 5 Jun 2026
FULL TIME
protocol design
Hdl
System Design
Pcie
C++

Job Description

Key Responsibilities

  • Design and implement CXL and PCIe switch architectures for high-speed interconnect solutions.
  • Develop software and firmware components using C++ for protocol control, configuration, and system integration.
  • Work with HDL-based designs for hardware modeling, validation, and integration.
  • Analyze and implement PCIe and CXL protocol specifications into functional switch solutions.
  • Collaborate with architecture, verification, and hardware teams to ensure correctness and performance of designs.
  • Debug complex protocol-level and system-level issues in switch implementations.
  • Contribute to performance optimization and scalability improvements for interconnect systems.
  • Participate in design reviews, architecture discussions, and technical evaluations.
  • Engage with global engineering teams to ensure consistent implementation and integration across platforms.
  • Ensure compliance with industry protocol standards and specifications

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