CA

Principal Design Engineer

Cadence
Bangalore5-10 LPA Posted 4 Jun 2026
FULL TIME
Debugging
Scripting
Pcie
Aes
Electrical
+3 more

Job Description

Key Responsibilities:

  • Hands-on experience in PCIe design and micro-architecture.
  • Use design tools effectively with solid understanding of PPA (Performance, Power, Area) optimization techniques.
  • Apply scripting and AI-assisted design tools within the development flow.
  • Debug complex designs and work closely with DV teams to resolve issues.
  • Optional: Implement and optimize Integrity and Data Encryption (IDE), AES Encryption/Decryption algorithms with GCM protocol.
  • Preferred: Experience in Automotive / FuSa domains.

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