PMTS EMIR convergence Engineer

THE ROLE:

As a member of the AECG Custom ASIC Group, you will help bring to life cutting-edge designs. As a member of the Power Delivery convergence team , you will work closely with the architecture, physical design teams, package, board, and product engineers to achieve first pass silicon success.

THE PERSON:

A successful candidate will work on full chip SoC electrical signoff convergence with physical design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES:

• Drive full chip IR/EM convergence on multiple ASICs across different technology nodes.
• Work closely with architecture, power management, package and floorplan team to come up with robust power delivery design.
• Work with RTL and PD team in coming up with the low power and UPF specification for the SoC.
• Work closely with CAD team to come up with new flows and methodologies in the power integrity domain.

PREFERRED SKILLSET:

• 18+ years of professional experience in the industry with a proven track record of successfully delivering complex SoCs
• Sound knowledge of Power delivery and power integrity domains
• Hands on experience on industry standard tools especially Redhawk based power integrity analysis
• Should have lead IR/EM convergence on multiple full chip SoCs
• Good in scripting languages such as Tcl and Perl
• Self driven, positive attitude and team worker

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering