QU

Peripherals Formal Verification Engineer

Qualcomm
Bangalore2-5 LPA Posted 26 May 2025
FULL TIME
Tcl
System Verilog
hardware engineering
SoC Verification
Scripting Languages
+1 more

Job Description

Qualcomm's Infra and Periph team in India is part of a global organization delivering cutting-edge infrastructure and peripheral solutions for Mobile, Compute, and Automotive industries. The Formal Verification Engineer will focus on verifying Infra and Peripheral RTL using industry-standard formal verification tools and advanced model/equivalence checking algorithms. The role involves close collaboration with worldwide design, systems, and EDA/CAD teams. Strong written and verbal communication skills are essential.

Minimum Qualifications

  • 4 to 12 years of experience in the VLSI industry.
  • Specialization in formal verification using tools such as JasperGold or VC-Formal.
  • Strong analytical skills to solve complex problems.
  • Knowledge of advanced formal verification methodologies and abstraction techniques.
  • Hands-on experience with Verilog/SystemVerilog HDLs and temporal logic assertions.
  • Ability to quickly understand complex RTL designs.
  • Proficiency with scripting languages like Perl, TCL, and/or Python.


Education

  • Bachelor's degree in Computer Science, Electronics and Communications Engineering, Information Systems, or related field.


Skills

  • SystemVerilog Assertions (SVA)
  • Formal Verification methodologies
  • SystemVerilog HDL
  • Scripting: Perl, TCL, Python (preferred)


Preferred Experience and Qualifications

  • Bachelor's degree + 3+ years Hardware Engineering or related experience
  • OR Master's degree + 2+ years Hardware Engineering or related experience
  • OR PhD + 1+ year Hardware Engineering or related experience
Join WhatsApp Channel