MTS Silicon Design Engineer

THE ROLE:

Be a member of the team that plays a significant role in ensuring the quality of next generation microprocessors through structured DFT, Automatic Test Pattern Generation (ATPG) and Logic Built-In Self-Test (LBIST) techniques.

Key responsibilities:

Collaborating with the design teams to ensure DFT design rules and guidelines are met

1. The person should have experience in timing concepts
2. Generating high quality manufacturing test patterns for stuck-at, transition fault models and through the use of on-chip test compression techniques
3. Exercising the LBIST circuitry and ensuring that repeatable signatures can be produced
4. Simulating and verifying the ATPG and LBIST patterns
5. Working with the product engineering teams on the delivery of manufacturing test patterns
6. Developing, improving and maintaining scripts as vital

Desired profile - The candidate must have detailed knowledge of DFT basics such as scan insertion, fault models, ATPG, BIST techniques, and on-chip compression techniques that reduce test time and tester memory. Experience with test tools such as FastScan and TestKompress is highly desirable.Scan/ATPG, knowledge of industry standard DFT features, simulation debug, MBIST

Academic credentials:

• MS/M Tech/BE in Computer Engineering/Electronics/Electrical Engineering
• Demonstrated success in a senior IC team role with similar skills

Location:

Hyderabad Telangana