Lead Physical Design Engineer

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• OR
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• OR
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
• OR
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• OR
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.PNR implementation for Qualcomm SoC's
• Good hands-on experience on Floorplanning, PNR and STA flows
• Good knowledge on Placement/Clock Tree Synthesis (CTS), optimization, etc
• Good understanding on signoff domains'' LEC/CLP/PDN knowledge, etc
• Good knowledge on Unix/Linux '' Perl/TCL fundamentals/scripting

Principal Duties and responsibilities

• Complete ownership on PNR implementation (Floorplanning, Placement, CTS, post_route,etc) on latest nodes.
• Signoff knowledge is mandatory (STA,Power analysis,FV, low power verification, PV,etc)
• Quick learner with good analytical and problem solving skills

Qualifications

• 6+ years experience with PNR flow in latest tech nodes (e.g., 4nm/5nm/7nm/10nm