Lead Application Engineer

Key Responsibilities

• Lead the design and verification of analog IC layouts from top-level floorplanning to complex block-level layouts
• Apply in-depth knowledge of analog layout design fundamentals, advanced node constraints, and foundry design rules
• Develop and maintain automation scripts for layout tasks to improve designer efficiency and consistency
• Ensure adherence to physical verification, extraction, EMIR analysis, and other back-end signoff processes
• Mentor and guide junior engineers in layout design and automation best practices
• Collaborate with cross-functional teams to integrate blocks into full-chip designs and support chip-level signoff
• Explore AI/ML-assisted tools and automation frameworks to optimize layout workflows and reduce cycle times
• Stay updated with industry trends in IC design, layout automation, and EDA tool capabilities