Custom Design Static Timing Analysis Engineer, Silicon

Responsibilities

• Perform (Static Timing Analysis) STA on mixed-signal designs to verify that all timing requirements are met. This involves analyzing the timing of digital paths within the chip.
• Develop and maintain STA constraints and scripts.
• Create and maintain accurate timing constraints for the entire chip, including both digital and mixed-signal portions.
• Ensure that constraints are consistent with the design specifications.
• Develop flow and methodology for IP collateral generation and Quality Assurance (QA) checks.

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, a relevant technical field, or equivalent practical experience.
• 5 years of experience in static timing analysis with mixed- signal designs.
• Experience in timing flow methodology and development.
• Experience in HSPICE, Nanotime, Liberate, Silicon Smart, or Virtuoso.
• Experience in coding using Perl, Python, TCL scripting languages.

Preferred qualifications:

• Master's degree or PhD in Computer Science, Electrical Engineering, or a related field.
• 10 years of experience in STA with experience on Analog/mixed signal designs.
• Experience with IP collateral generation/QA.
• Experience in Cadence/Synopsys tools.