Compiler Engineering Manager, Silicon

Responsibilities

• Work as part of the EdgeTPU compiler team, including analyzing and improving the compiler quality and performance on optimization decisions, correctness and compilation time.
• Develop parallelization and scheduling algorithms to optimize compute and data movement costs to execute machine learning workloads on the EdgeTPU.
• Work with EdgeTPU architects to design future accelerators, the hardware/software interface, and co-optimizations of the next generation EdgeTPU architectures. Work with product managers, researchers in identifying key machine learning trends, future use cases, etc.
• Collaborate with machine learning model developers, researchers, and EdgeTPU hardware/software teams to accelerate the transition from research ideas to user experiences running on the EdgeTPU.
• Manage a team of experienced compiler engineers.

Minimum qualifications:

• Bachelor's degree in Computer Science, Electrical Engineering or equivalent practical experience.
• 8 years of experience in compilers (optimization, parallelization, etc.)
• Experience in Multi-Level Intermediate Representation (MLIR) or Low Level Virtual Machines (LLVM).

Preferred qualifications:

• Master's degree or PhD in Computer Science or any equivalent field.
• Experience in compiler development for accelerator-based architectures.
• Experience running a large program, or several projects simultaneously.
• Experience compiling for heterogeneous architectures across IPs, including but not limited to CPU, GPU, and NPUs.