ASIC/IP Design Engineer (Bluetooth)-Sr Eng/Sr Lead

General Summary:

Join a specialized team focused on designing IP for wireless sub-systems used in market-leading products. This role involves developing connectivity solutions for mobile phones, wearables, IoT devices, and mobile infrastructure chips as part of the Bluetooth IP Design team. Responsibilities span the entire VLSI development cycle, including architecture, microarchitecture, RTL design, and integration on cutting-edge technology nodes. The role requires close collaboration with system architecture, verification, SoC design, validation, synthesis, and physical design teams to achieve design convergence.

Skills and Experience:

• 2 to 6 years of experience designing complex ASICs.
• Strong proficiency in RTL coding using Verilog/SystemVerilog for complex designs.
• Experience with low-power design methodologies and handling multiple clock domains.
• Excellent debugging and analytical abilities.
• Strong verbal and written communication skills.
• Hands-on experience with front-end design tools.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field plus 2+ years of hardware engineering or related work experience; OR
• Master's degree plus 1+ year of hardware engineering or related experience; OR
• PhD in a relevant field.