QUQualcomm
ASIC RTL Design Engineer (Display) - Sr Lead
Bangalore ₹4-9 LPA Posted 26 May 2025
FULL TIME
Debugging
hardware engineering
Verilog
Synthesis
Rtl Design
+1 more
Job Description
We are seeking a skilled Front-End RTL Design Engineer to lead design activities for Display Sub-systems across Qualcomm's diverse product portfolio including VR, AR, Compute, IoT, and Mobile. The role involves RTL design, verification, low-power feature enablement, and close collaboration with cross-functional teams globally.
Required Qualifications
- Bachelor's or Master's degree in Electronics & Telecommunication Engineering, Microelectronics, Computer Science, or related field.
- 4+ years of RTL design or hardware engineering experience.
Skills & Experience Required
- Strong domain expertise in RTL design, implementation, and integration.
- Proficiency in Verilog, VHDL, and SystemVerilog coding.
- Experience with micro-architecture and ASIC/core design.
- Familiarity with synthesis, formal verification, linting, CDC (clock domain crossing), low-power methodologies, and UPF.
- Scripting skills in Perl, Python, or TCL.
- Strong debugging skills across simulation, emulation, and silicon environments.
- Proven ability to collaborate effectively with cross-functional teams across different time zones.
- Proactive team player with good communication skills.
Responsibilities
- Lead front-end design efforts for Display Sub-system IPs used in multiple Qualcomm business units.
- Perform RTL design, simulation, synthesis, timing analysis, linting, CDC checks, low-power verification, and formal verification.
- Collaborate with technology and circuit design teams to finalize IP specifications.
- Work closely with verification and physical design teams for IP implementation completion.
- Support SoC teams with Display Sub-system IP integration and front-end design flow.
- Enable low-power features in wireless SoC products by close interaction with system, software, and test teams.
- Evaluate and analyze new low-power technologies for product needs.
- Conduct block- and chip-level performance analysis, identify bottlenecks, and recommend solutions.
Minimum Qualifications
- Bachelor's degree + 3+ years of hardware engineering or related experience,
- OR
- Master's degree + 2+ years of hardware engineering or related experience,
- OR
- PhD + 1+ year of hardware engineering or related experience.
