SY

ASIC Digital Design, Sr Engineer - AMS Verification

Synopsys
Hyderabad5-9 LPA Posted 30 May 2025
FULL TIME
Tcl
Verilog
Uvm
CMOS
VMM
+3 more

Job Description

What You ll Need:

  • Looking for 2+yrs experience with BTech / MTech in VLSI / Electronics/ Microelectroni cs
  • Knowledge or hands-on expertise/anal ysis of Analog and digital CMOS circuit designs
  • Knowledge on electrical circuit networks and analysis
  • Knowledge or hands-on Verilog/System Verilog languages and supported methodologies like VMM, UVM
  • Must be able write/modify testcases, checkers, scoreboards in a system Verilog based test environment
  • AMS verification experience in high speed Serdes designs supporting multi-protocol s is an advantage.
  • Experience with the Synopsys Analog mixed-signal design tool set is an advantage.
  • Modelling languages Verilog-a/ams can be an advantage
  • Programming/sc ripting know-how e. g. tcl, perl, python
  • Experience with Linux
  • Good communication skills, ability to take ownership
  • Self-organized to ensure that project timescales are met
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