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Job Description
What You ll Need:
- 0-3 years of related experience in DFT architectures and methodologies.
- Moderate experience in generating scan patterns and coverage statistics for various fault models.
- Experience in scan stuck-at and at-speed coverage exploration, simulation, and debug.
- Familiarity with state-of-the-art EDA tools for DFT, design, and verification.
- Basic knowledge of STA for DFT mode timing constraint development and exploration.
Who You Are:
- Excellent communicator with the ability to work effectively with cross-functional teams.
- Detail-oriented and driven by a passion for technology and continuous learning.
- Strong debugging skills and experience in scripting languages like Perl, TCL, and Python.
- Committed to fostering an inclusive and diverse work environment.
- Adaptable and eager to take on new challenges and responsibilities.
