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Analog Layout Design Engineer

Synopsys
Bangalore3-7 LPA Posted 30 May 2025
FULL TIME
Layout Design
Analog Layout
CMOS
IC layout
LVS

Job Description

What Youll Need:

  • 6+ years of experience in Analog Mixed-Signal layout and verification,
  • Advanced understanding of deep submicron effects and mitigation techniques,
  • Proficiency in using advanced layout design tools and methodologies,
  • Solid understanding of CMOS and FinFET layouts and process technology in 28nm and below,
  • Familiarity with layout design flow, including top-level verification flow, DRC/LVS, LPE,
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