SY

Analog Design Engineer, Senior

Synopsys
Hyderabad4-7 LPA Posted 30 May 2025
FULL TIME
Tcl
Ir
Perl
Python

Job Description

Required Qualifications:

  • Bachelor with 2 years experience or MSEE (or PhD) in Electrical Engineering, Computer Engineering, or similar technical field
  • In-depth familiarity with transistor level circuit design - sound CMOS design fundamentals.
  • Silicon-proven experience implementing circuits like bandgap references, voltage regulators.
  • Detailed design experience with high custom logic design
  • Experience optimizing FinFET CMOS layout to minimize the effect of parasitic resistance and capacitance, and to reduce the effects of local device mismatch and proximity effects.
  • Awareness of ESD issues (i.e. circuit techniques, layout). and design for reliability (i.e. electro-migration, IR, aging, etc.).
  • Experience with EDA tools for schematic entry, physical layout, and design verification.
  • High proficiency with spice simulators including HSPICE, Finesim and XA
  • Knowledgeable in Verilog-A and/or System-Verilog for analog behavioral modeling and simulation-control / data-capture.

Plus Qualifications:

  • Ability to provide automation for rapid and dynamic design needs is highly sought-after
  • Experience with STA and cell characterization such as Nanotime, Primetime, SiliconSmart
  • Experienced in STAR or similar extractor to debug extraction issues
  • Extensive programming skills in languages such as Python, Perl, TCL and C/C++

Required Skills

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